Tutorials, updates, and deep dives into FPGA register automation.
Comprehensive comparison of Axion-HDL, airhdl, hdl-registers, vhdmmio, RgGen, and PeakRDL. Find the right register generator for your FPGA/ASIC project.
Read Comparison →Learn how to define AXI4-Lite registers directly inside your VHDL code using comments, and generate a complete register space automatically.
Read Tutorial →Discover the power of defining your register map in a simple YAML file. Generate VHDL, C headers, and documentation from a single source of truth.
Read Tutorial →Build a multi-master system using the Axion Common Bridge. Learn how to connect multiple register spaces and verify the entire design with Cocotb.
Read Tutorial →